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<h1>fpga.h File Reference</h1>Low-level FPGA interface. <a href="#_details">More...</a>
<p>
<table border="0" cellpadding="0" cellspacing="0">
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<tr><td colspan="2"><br><h2>Defines</h2></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="7e2222d40948c2f8c5fef80c183a65db"></a><!-- doxytag: member="fpga.h::fpga_write_byte" ref="7e2222d40948c2f8c5fef80c183a65db" args="(addr, v)" -->
#define&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="fpga_8h.html#7e2222d40948c2f8c5fef80c183a65db">fpga_write_byte</a>(addr, v)&nbsp;&nbsp;&nbsp;((volatile uint8_t*) FPGA_BASE)[(addr)] = (v)</td></tr>

<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">FPGA Write Byte - write a byte to an FPGA register. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="e13a75c988473b6913c57ac66d4eba70"></a><!-- doxytag: member="fpga.h::fpga_read_byte" ref="e13a75c988473b6913c57ac66d4eba70" args="(addr)" -->
#define&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="fpga_8h.html#e13a75c988473b6913c57ac66d4eba70">fpga_read_byte</a>(addr)&nbsp;&nbsp;&nbsp;((volatile uint8_t*) FPGA_BASE)[(addr)]</td></tr>

<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">FPGA Read Byte - read a byte from an FPGA register. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="5d7ae5f4bd3f4da264bb875169c4d46b"></a><!-- doxytag: member="fpga.h::fpga_get_version_major" ref="5d7ae5f4bd3f4da264bb875169c4d46b" args="()" -->
#define&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="fpga_8h.html#5d7ae5f4bd3f4da264bb875169c4d46b">fpga_get_version_major</a>()&nbsp;&nbsp;&nbsp;fpga_read_byte(FPGA_VERSION_MAJ)</td></tr>

<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Get the FPGA Major Version. <br></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="aabb4d614b4d0fa93777dac200cbe384"></a><!-- doxytag: member="fpga.h::fpga_get_version_minor" ref="aabb4d614b4d0fa93777dac200cbe384" args="()" -->
#define&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="fpga_8h.html#aabb4d614b4d0fa93777dac200cbe384">fpga_get_version_minor</a>()&nbsp;&nbsp;&nbsp;fpga_read_byte(FPGA_VERSION_MIN)</td></tr>

<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Get the FPGA Minor Version. <br></td></tr>
<tr><td colspan="2"><br><h2>Functions</h2></td></tr>
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="b3771180bb498700bf577cb1ad9f86e8"></a><!-- doxytag: member="fpga.h::fpga_init" ref="b3771180bb498700bf577cb1ad9f86e8" args="(uint16_t start, uint16_t len)" -->
uint8_t&nbsp;</td><td class="memItemRight" valign="bottom"><a class="el" href="fpga_8h.html#b3771180bb498700bf577cb1ad9f86e8">fpga_init</a> (uint16_t start, uint16_t len)</td></tr>

<tr><td class="mdescLeft">&nbsp;</td><td class="mdescRight">Initialise FPGA. <br></td></tr>
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<hr><a name="_details"></a><h2>Detailed Description</h2>
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